Opportunities at Architect

Head of AI

About Architect


Architect is building the intelligence layer for chip companies to bring the time to tapeout from 3 years to 6 months. Our AI amplifies your hardware engineers across DI, DV, and PD workflows, help build IP from the ground up, and keeps you in the loop at every step.


Founded out of Stanford, we’re one of the fastest-moving Bay Area startups, blending frontier ML with deep chip design expertise to transform a trillion-dollar industry. Backed by top VCs and legendary angels, we’re assembling a world-class team of founding engineers and researchers to architect the next era of silicon.


What You’ll Do

  • Play a foundational role in defining the technical roadmap.
  • Lead, mentor, and scale a team of top-tier ML engineers. Guide research direction, implementation standards, and modeling infrastructure.
  • Contribute to building the ML systems and research strategy for Architect across various domains.
  • Architect and deploy novel agent-based systems, including training models for RTL Code generation, physical design tasks automation and hardware problem reasoning.
  • Interface with hardware engineers to identify bottlenecks in chip design pipelines that ML can solve.
  • Stay ahead of state-of-the-art techniques in ML4EDA, reinforcement learning, agentic systems, etc.

What We’d Like to See

  • Degree: PhD in Computer Science, EECS, Mathematics, or a closely related field. Preferably, specialization in Machine Learning, Deep Learning or Artificial Intelligence.
  • Hands-On Experience:
    • Strong industry or research background in leading engineering teams, building end-to-end ML pipelines, training models and building multi-agent systems.
    • 5+ years of industry experience; 8 yrs+ strongly preferred.
  • Core Skills:
    • Deep expertise in reinforcement learning, self-supervised learning, SFT, and multi-agent systems.
    • Experience building verifiers, reward functions, and agentic environments.
    • Fundamental understanding of modern model architectures, scaling laws, and steering data towards a training objective.
    • Publications in top ML (NeurIPS, ICLR, ICML) or EDA (DAC, ICCAD, DVCon) venues
    • End-to-end model training, especially owning the training recipe, data recipe, and RL post-training workflows
    • Multi-agent orchestration, context management, prompt optimization, inference/test-time scaling
    • Ability to move fast, prototype, and scale research into production.
    • Obsession with pushing state-of-the-art performance in real-world constraints.
  • Systems Knowledge: Comfortable with cloud-native architectures and distributed systems.
  • Bonus:
    • Prior AI-for-chip-design experience (NVIDIA, DeepMind, Synopsys, Cadence, etc.)
    • Foundation in Electrical/Computer Engineering and chip-design or verification processes

What We Offer

  • Competitive salary and equity stake
  • Fast-paced startup with autonomy and visible impact
  • Cutting-edge AI-driven chip design challenges

Engineering

Palo Alto, CA

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