Avicena is a privately held company developing microLED based ultra-low power high bandwidth interconnects for chip-to-chip communications.  This technology will revolutionize High-Performance (HPC) and Cloud computing, as well as other industries where low power interconnects are critical like camera sensors, autonomous vehicles, and aerospace. Avicena is headquartered in Sunnyvale, California with a development center in Edinburgh, Scotland. The company was founded in 2019 by leading technologists from the optical networking industry with a track record of delivering breakthrough products.  (www.avicena.tech)   

About the role:

As a process technician in our clean room, your responsibilities may include being responsible for performing technical tests and experiments for engineering in the wafer fabrication area of semiconductor manufacturers. Process technicians also test new products and provide technical assistance to process development and engineering personnel.

This technician will be a valuable part of the team, interfacing and communicating with engineering and manufacturing groups across the fab to ensure all issues are solved appropriately and efficiently. Additionally, you will provide process and product support to the organization and address production concerns and disposition of production material.

• Ability to identify, multi-task, and resolve multiple priority issues quickly and efficiently to improve overall fab performance
• Ability to learn and understand process flow quickly and support the engineering organization as needed.
• Exceptional attention to detail
• Strong collaborative skills in team environment
• Excellent verbal and written communications skills.
• Perform other designated tasks as assigned by management.
• Comfortable in a cleanroom environment.
• Proficient with MS Office, Word and Excel

Qualifications:

• Typically a High school diploma. AA degree or 4 years of experience in the FAB is preferred.
• Photolithography, Wet Etch, Thin film deposition and Optical microscope inspection experience are required.
• On wafer Test, Dry Etch experience, SEM is preferred, but will train the right person with semiconductor/wafer fab experience in other areas of the fab.

"This shift includes weekend coverage."