Role Overview

We are seeking an experienced Applications Engineer specializing in advanced high-speed Ethernet SerDes technologies. In this key technical role, you will bridge the gap between silicon architecture, firmware development, hardware qualification, and customer implementation.

You will work closely across cross-functional groups—including ASIC design, manufacturing, test, calibration, and reliability teams—while providing technical leadership and direct customer engagement.

What you'll do

Technical Leadership & Customer Engagement

• Direct Customer Interaction: Drive direct technical support, debug complex issues, and deliver technical training for customers and Field Application Engineers (FAEs).

• Cross-Functional Collaboration: Lead hardware/software bring-up efforts in collaboration with ASIC, manufacturing, test, calibration, and reliability engineering teams.

• Project Management: Manage multiple complex tasks and project timelines concurrently.

Hardware & System Integration

• Schematic & Layout Review: Review PCB schematics and board layouts for high-speed signal integrity and hardware compatibility.
• Lab Debug & Measurement: Perform hands-on debugging using Ethernet traffic generators, high-speed oscilloscopes, jitter analyzers, spectrum analyzers, network analyzers, and OTN testers.

Education & Experience

• Degree: BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.

• Experience: 8–10+ years of practical experience in high-speed hardware, SerDes, or system/board engineering.

What We're Looking For

• SerDes & PHY Expertise: Strong working knowledge of high-speed (224Gbps / 112Gbps+) PHYs and SerDes architectures.

• Ethernet & Optical Standards: Deep knowledge of 100Gbps / 200Gbps / 400Gbps optical systems and standards; OTN experience is a plus.

• PAM4 Modulation: Hands-on experience with PAM4 signaling and high-speed Signal Integrity (SI) analysis.

• SoC Architecture: Experience in architecture, programming, or support of complex System-on-Chip devices.

• Direct experience with MACsec (802.1AE) key management and data-plane acceleration.

• PTP (IEEE 1588) hardware timestamping / clock recovery synchronization in optical hardware.

• Reliability & Failure Analysis: Background driving product qualification, stress testing, reliability investigations, and board-level failure analysis (FA).

Compensation

The compensation range shown below represents total target cash compensation and includes both base salary and target bonus. Actual compensation will vary based on factors such as experience, skills, qualifications, job level, and work location.

In addition to cash compensation, this position is eligible for equity in the form of stock options, giving you the opportunity to share in the Company’s long-term growth and success.

About TYLsemi, Inc.

The Opportunity

The AI infrastructure market is exploding. Every hyperscaler, every cloud provider, every AI company is building custom silicon. But they all face the same problem: how do you connect hundreds of chips, deliver clean power at scale, and move terabits of data without melting the package?

That's what we solve. TYLsemi builds the chiplet infrastructure IP — the IO, power delivery, and interconnect building blocks — that makes AI/HPC systems actually work at scale.

This isn't a nice-to-have. It's the critical path.

Why Now

The Market Window

The semiconductor industry is going through its biggest architectural shift in 40 years:

• Moore's Law is dead. 2nm and beyond delivers marginal performance gains. The future is chiplets, not monolithic dies.
• Custom silicon is now mainstream. Google, Microsoft, Amazon, Meta, OpenAI — they're all designing their own ASICs. The $50B custom silicon market is growing 30% annually.
• IO and power are the bottleneck. Solve hard problems and provide something which is a category in itself.
• Translation: We're entering the market at exactly the moment when every major AI/HPC player needs what we're building, and their alternatives are disappearing.

Culture & Team: How We Work

No Politics, No Bureaucracy

There are no layers, no approval chains, no corporate theater.

• If you have an idea, we test it. If it works, we ship it.
• No endless meetings, no PowerPoint presentations to convince middle management.

Remote-Friendly, Global Team

• US team: Bay Area preferred, but we hire the best people regardless of location
• India team: Building a world-class design center in Bangalore

Move Fast, Ship Real Products

We're not a research project. We have paying customers, committed capital, and aggressive timelines.

This is a company, not a lifestyle business. We're building to win.

What We Value

• Ownership mindset. You're not here to execute someone else's roadmap. You're here to define it.
• Bias for action. We move fast. Analysis paralysis doesn't fly here.
• Deep technical expertise. This is hard engineering. We need people who've shipped real silicon and debugged real hardware.
• Low ego, high standards. We don't care about titles or politics. We care about results.

The Ask

If you're reading this, you're probably comfortable. You have a good job at a stable company with all the benefits.

We're asking you to walk away from that and bet on us.

Here's why you should:

• The market is real. AI infrastructure spending is $200B+ annually and growing 40% YoY. Every hyperscaler needs what we're building.
• The team has done this before. We've built and exited semiconductor companies at scale. This isn't our first rodeo.
• The traction is de-risked. We have LOIs, strategic investors, and a clear path to revenue.
• The work is consequential. You're not optimizing someone's ad click-through rate. You're building the silicon infrastructure that powers AI.

This is the bet. Join us and build something that matters.

Or stay comfortable. No judgment.

But if you're the kind of person who wants to take the shot, we'd love to talk.

READY TO JOIN?